High Speed Serdes Board Design
Palojärvi, Jenna (2023)
2023
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Julkaisun pysyvä osoite on
https://urn.fi/URN:NBN:fi:amk-202303123426
https://urn.fi/URN:NBN:fi:amk-202303123426
Tiivistelmä
The objective of this thesis was to provide a high-speed adapter for testing and verifying JESD204C high-speed links. The thesis work included schematic design, post layout simulation and finished adapter prototype testing. The client of this thesis is Nokia. This thesis starts with the theory part of SerDes in its top level and continues to the theory part of high-speed printed circuit board design. After the theory, the thesis continues to the parts of the adapter design work, simulating and first prototype testing.
The circuit board included e.g., high-speed connectors, LDO, pin header for Aardvark debugger, MMCX connector for clock signals. The components that meet the requirements were used. The circuit board was designed using Siemens Xpedition designer tool. Hyperlynx tools provided by Siemens were used for clock signal integrity simulation and SerDes compliance check.
The result for the thesis was a working circuit board that meets the requirements for the most parts. Based on results adapter worked as intended, but chip-to-chip SerDes testing was not to-tally passed with 32Gbps data rate in during this thesis process. Some improvements found during thesis process.
The circuit board included e.g., high-speed connectors, LDO, pin header for Aardvark debugger, MMCX connector for clock signals. The components that meet the requirements were used. The circuit board was designed using Siemens Xpedition designer tool. Hyperlynx tools provided by Siemens were used for clock signal integrity simulation and SerDes compliance check.
The result for the thesis was a working circuit board that meets the requirements for the most parts. Based on results adapter worked as intended, but chip-to-chip SerDes testing was not to-tally passed with 32Gbps data rate in during this thesis process. Some improvements found during thesis process.