Internal test feature validation and usage in design testing

Abstract

The topic of this thesis was the validation and usage of internal test feature within System on Chip (SoC), commissioned by Nokia Oyj. The primary objective was to create a test specification for the capture insertion tool, validate the feature, and determine its use case in SoC validation.

The work involved creating a test specification for the feature and developing tests with Robot Framework to capture and insert data. These functionalities were tested in an Emulation environment. The capture function enabled capturing data from specified points within the data path, while the insertion function allowed inserting data into existing points.

The analysis was conducted using a Python-based tool to check key metrics such as Error Vector Magnitude, Time and Frequency Offsets, IQ/RF Power Levels, and Signal-to-Noise ratio or Modulation Error Ratio. The results highlighted the differences in performance metrics, identifying areas that required further debugging.

The result of this thesis was comprehensive understanding of the capture insertion tool’s operation and its benefits in SoC Validation, providing valuable insights into isolating, validating, and debugging individual subsystems within the SoC.